Xilinx Zynq-7000 User Manual page 538

X-Ref Target - Figure 4-25
Memory Model License
The MIG tool can output a chosen vendor's memory model for simulation purposes for
memories such as LPDDR2 SDRAMs. To access the models in the output sim folder, click the
license agreement
Agreement box to accept it. If the license agreement is not agreed to, the memory model
is not made available. A memory model is necessary to simulate the design.
Zynq-7000 AP SoC and 7 Series FPGAs MIS v4.1
UG586 November 30, 2016
Chapter 4: LPDDR2 SDRAM Memory Interface Solution
Figure 4-25: Summary
(Figure 4-26). Read the license agreement and check the Accept License
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538
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