Xilinx Zynq-7000 User Manual page 295

I/O Planning Options
Figure 2-23 shows the I/O Planning Options page.
X-Ref Target - Figure 2-23
• Pin/Bank Selection Mode – This allows you to specify an existing pinout and generate
the RTL for this pinout or pick banks for a new design.
for using an existing pinout. You must assign the appropriate pins for each signal. A
choice of each bank is available to narrow down the list of pins. It is not mandatory to
select the banks prior to selection of the pins. Click Validate to check against the MIG
pinout rules. You cannot proceed until the MIG DRC has been validated by clicking
Validate.
Zynq-7000 AP SoC and 7 Series FPGAs MIS v4.1
UG586 November 30, 2016
Chapter 2: QDR II+ Memory Interface Solution
Figure 2-23: I/O Planning Options Page
www.xilinx.com
Figure 2-24 shows the options
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