Xilinx Zynq-7000 User Manual page 425

Memory interface solutions
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Chapter 3: RLDRAM II and RLDRAM 3 Memory Interface Solutions
X-Ref Target - Figure 3-37
Figure 3-37: High-Level Block Diagram of RLDRAM II/RLDRAM 3 Interface Solution
Zynq-7000 AP SoC and 7 Series FPGAs MIS v4.1
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UG586 November 30, 2016
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