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Xilinx Zynq-7000 Getting Started Manual

Xilinx Zynq-7000 Getting Started Manual

All programmable soc, evaluation kit and video and imaging kit, vivado design suite 2013.3
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Download this manual See also: User Manual
Zynq-7000 All Programmable SoC:
ZC702 Evaluation Kit
and
Video and Imaging Kit
(Vivado Design Suite 2013.3)
Getting Started Guide
UG926 (v6.0) December 17, 2013
This document applies to the following software versions: Vivado Design Suite 2013.3 and 2013.4
This document applies to the following software versions: Vivado Design Suite 2013.3 and 2013.4
This document applies to the following software versions: Vivado Design Suite 2013.3 and 2013.4
This document applies to the following software versions: Vivado Design Suite 2013.3 and 2013.4

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  • Page 1 Zynq-7000 All Programmable SoC: ZC702 Evaluation Kit Video and Imaging Kit (Vivado Design Suite 2013.3) Getting Started Guide UG926 (v6.0) December 17, 2013 This document applies to the following software versions: Vivado Design Suite 2013.3 and 2013.4 This document applies to the following software versions: Vivado Design Suite 2013.3 and 2013.4 This document applies to the following software versions: Vivado Design Suite 2013.3 and 2013.4...
  • Page 2 Limited Warranties which can be viewed at http://www.xilinx.com/warranty.htm; IP cores may be subject to warranty and support terms contained in a license issued to you by Xilinx. Xilinx products are not designed or intended to be fail-safe or for use in any application requiring fail-safe performance;...

  • Page 3: Revision History

    For reference design files, documents, and board source files, go to the Zynq-7000 AP SoC Video and Imaging Kit documentation page., page Changed FMC1 and FMC2 connector types to LPC I/O expansion connectors. Added tables of default settings to the section...
  • Page 4 2 and 3. 10/21/13 Updated document for Vivado Design Suite 2013.3. Updated Figure 3-6, Figure 3-7, Draft Figure 3-9. Updated zynq> commands (changed sobel_qt to run_sobel.sh). www.xilinx.com ZC702 and ZVIK Getting Started Guide Send Feedback UG926 (v6.0) December 17, 2013...

  • Page 5: Table Of Contents

    Chapter 5: Next Steps Next Steps for the Zynq-7000 AP SoC Video and Imaging Kit (ZVIK) ......45 ZC702 and ZVIK Getting Started Guide www.xilinx.com...
  • Page 6 Xilinx Resources ........

  • Page 7: Chapter 1: Introduction

    Overview The Zynq®-7000 All Programmable SoC (AP SoC) ZC702 evaluation kit shown in Figure 1-1 is based on the XC7Z020 CLG484-1 AP SoC. For additional information, see the Zynq-7000 AP SoC Product Table [Ref 1]. A built-in self-test (BIST) is provided for the ZC702 evaluation kit.

  • Page 8: Zc702 Evaluation Kit Contents

    In the remainder of this document, the Zynq-7000 AP SoC ZC702 evaluation kit is referred to Note: as the ZC702 Evaluation Kit and the Zynq-7000 AP SoC Video and Imaging Kit is referred to as ZVIK. ZC702 Evaluation Kit Contents The ZC702 evaluation kit includes the following items: •...
  • Page 9 ZC702 Evaluation Kit Contents Node-locked, device-locked to the Zynq-7000 XC7Z020 CLG484-1 device ° • Board design files Schematics ° Board layout files ° Bill of materials ° • Documentation ZC702 Evaluation Kit and Video Imaging Kit Targeted Reference Design °...

  • Page 10: Zynq-7000 Ap Soc Video And Imaging Kit Contents

    For reference design files, documents, and board source files, go to the Zynq-7000 AP SoC Video and Imaging Kit documentation page. Key Features of the ZVIK Key features of the additional components of the Zynq-7000 AP SoC Video and Imaging kit include: • HDMI input/output FMC module HDMI input °...

  • Page 11: Default Jumper And Switch Settings

    Default Jumper and Switch Settings Figure 1-3 calls out the major features on the ZC702 board. See the ZC702 Evaluation Board for the Zynq-7000 XC7Z020 All Programmable SoC User Guide (UG850) [Ref 4] for more detailed information about the ZC702 board.
  • Page 12 Chapter 1: Introduction X-Ref Target - Figure 1-4 SW11 SW11 Down/Off Down/Off UG926_c1_04_021213 Figure 1-4: Default Jumper and Switch Settings on the ZC702 Board www.xilinx.com ZC702 and ZVIK Getting Started Guide Send Feedback UG926 (v6.0) December 17, 2013...
  • Page 13 CAN BUS COMMON-MODE CANH HDR Ethernet PHY HDR USB 2.0 USB_RESET_B CAN BUS COMMON-MODE CANL HDR JTAG HDR J58 pin 2 3.3V SEL XADC_VCC5V0 = VCC5V0 ZC702 and ZVIK Getting Started Guide www.xilinx.com Send Feedback UG926 (v6.0) December 17, 2013...
  • Page 14 USB 2.0 Mode USB 2.0 J1 ID SEL USB 2.0 J1 VBUS CAP SEL USB 2.0 J1 GND SEL XADC_VREP SEL XADC_VCC SEL XADC_VREF Source SEL www.xilinx.com ZC702 and ZVIK Getting Started Guide Send Feedback UG926 (v6.0) December 17, 2013...

  • Page 15: Chapter 2: Zc702 Evaluation Kit Built-In Self-Test

    10 to 15 minutes. For a description of all the features on the ZC702 board, see ZC702 Evaluation Board for the Note: Zynq-7000 XC7Z020 All Programmable SoC User Guide (UG850) [Ref BIST Setup Requirements These are the prerequisites for running the BIST demonstration.

  • Page 16: Hardware Bist Board Setup

    4 is switched to the left for the BIST to boot from Quad SPI device and run the system demonstration utility. X-Ref Target - Figure 2-1 UG926_c2_01_061212 Figure 2-1: Settings for the Mode Switch to Boot from Quad SPI Mode www.xilinx.com ZC702 and ZVIK Getting Started Guide Send Feedback UG926 (v6.0) December 17, 2013...

  • Page 17: Hardware Bring-Up

    Figure 2-2: ZC702 with the UART and Power Cable Attached 3. Connect the power cable. 4. Switch the ZC702 board’s power to ON (SW11 switched up as shown in Figure 1-4). ZC702 and ZVIK Getting Started Guide www.xilinx.com Send Feedback UG926 (v6.0) December 17, 2013...
  • Page 18 Select the baud rate = 115200, Data bits = 8, Parity = None, Stop Bits = 1, and Flow control = None. Click OK. Steps and diagrams refer to using a Windows XP or Windows 7 host PC. Note: www.xilinx.com ZC702 and ZVIK Getting Started Guide Send Feedback UG926 (v6.0) December 17, 2013...
  • Page 19 Hardware Bring-Up Figure 2-4 through Figure 2-6 show the steps for setting the USB-UART port. X-Ref Target - Figure 2-4 UG926_c2_04_061212 Figure 2-4: Configuring the Driver ZC702 and ZVIK Getting Started Guide www.xilinx.com Send Feedback UG926 (v6.0) December 17, 2013...
  • Page 20 Chapter 2: ZC702 Evaluation Kit Built-In Self-Test X-Ref Target - Figure 2-5 UG926_c2_05_061212 Figure 2-5: UART Port Setting Tab www.xilinx.com ZC702 and ZVIK Getting Started Guide Send Feedback UG926 (v6.0) December 17, 2013...
  • Page 21 Hardware Bring-Up X-Ref Target - Figure 2-6 UG926_c2_06_061212 Figure 2-6: Select a COM Port (between COM1 and COM4) ZC702 and ZVIK Getting Started Guide www.xilinx.com Send Feedback UG926 (v6.0) December 17, 2013...

  • Page 22: Run The Bist Application

    Zynq-7000 AP SoC ZC702 Evaluation Kit documentation page. For more detailed information about these BIST tests, see the ZC702 Evaluation Board for the Zynq-7000 XC7Z020 All Programmable SoC User Guide (UG850) [Ref www.xilinx.com ZC702 and ZVIK Getting Started Guide Send Feedback...
  • Page 23 1-4, TIP: Table 1-1, and Table 1-2. If these settings are correct and the test still fails, please contact Xilinx Support to review your Support options. ZC702 and ZVIK Getting Started Guide www.xilinx.com Send Feedback UG926 (v6.0) December 17, 2013...
  • Page 24 Chapter 2: ZC702 Evaluation Kit Built-In Self-Test www.xilinx.com ZC702 and ZVIK Getting Started Guide Send Feedback UG926 (v6.0) December 17, 2013...

  • Page 25: Chapter 3: Getting Started With The Base Targeted Reference Design

    This section provides step by step instructions for bringing up the board and running the video Targeted Reference Design (TRD). In this design, the Zynq-7000 AP SoC performs real-time processing of a 1080p60 video stream—either in Processing System (PS) software or Programmable Logic (PL) hardware accelerator.
  • Page 26 The AP SoC allows the user to implement a specific functionality either as a software program running on the Zynq-7000 AP SoC PS or as a hardware design inside the programmable logic (PL). The Base TRD demonstrates how the user can seamlessly switch between a software or a hardware implementation, contributing to ease of use.

  • Page 27: Base Trd Key Features

    A Sobel accelerator • One Performance Monitor The software includes: • Xilinx Zynq-7000 AP SoC standard Linux kernel (based on Open Source Linux version 3.x) • Linux device drivers for TRD-specific IPs. • A Qt-based Linux application demonstrating the video processing pipeline •...

  • Page 28: Base Trd Hardware Setup Requirements

    The example mentioned in this package has been tested with a Dell model #P2412H Note: display monitor. However, the example should work well with any HDMI-compatible display device. www.xilinx.com ZC702 and ZVIK Getting Started Guide Send Feedback UG926 (v6.0) December 17, 2013...
  • Page 29 Running the Video Demonstration for 720p Video Resolution, page 38 more details. • Ensure that the refresh rate for the source is set to 60 Hz. ZC702 and ZVIK Getting Started Guide www.xilinx.com Send Feedback UG926 (v6.0) December 17, 2013...

  • Page 30: Trd Demonstration Procedure

    A adapter. If a USB hub is not available, the mouse can be plugged directly into the female USB connection of the USB Micro-B to female A adapter, but the user www.xilinx.com ZC702 and ZVIK Getting Started Guide Send Feedback...
  • Page 31 3. Insert the SD MMC, which contains the TRD binaries, into the SD slot on the ZC702 board. Ensure the binary files are in the first partition of the FAT32-formatted SD MMC card ° at its root level. ZC702 and ZVIK Getting Started Guide www.xilinx.com Send Feedback UG926 (v6.0) December 17, 2013...

  • Page 32: Running The Qt-Based Gui Application Demonstration

    Use the following UART configuration: Baud rate = 115200, bits = 8, parity = none, and stop bits = 1. This step is required to view debug information or to run the UART Menu-Based Note: Demonstration application. www.xilinx.com ZC702 and ZVIK Getting Started Guide Send Feedback UG926 (v6.0) December 17, 2013...
  • Page 33 Running the Qt-Based GUI Application Demonstration 3. Wait for the ZC702 board to be configured and booted with Linux. The XILINX ZYNQ banner appears on the display monitor after approximately two minutes as shown in Figure 3-5. X-Ref Target - Figure 3-5...
  • Page 34 7. Exercise different options by pressing the buttons available in the GUI to evaluate the different use cases mentioned in Table 3-1. Table 3-1: Zynq-7000 AP SoC Base TRD Video Demonstration Use Cases Use Case Video Source Control Sobel Filter Control...
  • Page 35 Figure 3-8 shows the detected image edges of the video generated by the TPG, that is, case 1 versus case 2 or 3 of Table 3-1. ZC702 and ZVIK Getting Started Guide www.xilinx.com Send Feedback UG926 (v6.0) December 17, 2013...

  • Page 36: Running The Uart Menu-Based Demonstration Application

    1. Go to the UART terminal started on your host PC as explained in step 2 from Running the Qt-Based GUI Application Demonstration, page www.xilinx.com ZC702 and ZVIK Getting Started Guide Send Feedback UG926 (v6.0) December 17, 2013...
  • Page 37 Exercise different options by entering the use case number displayed in against Table 3-2 Enter your choice: on the terminal. Table 3-2: Zynq-7000 AP SoC Base TRD Video Demonstration Use Cases Use Case Video Source Control Sobel Filter Control TPG interference...

  • Page 38: Running The Video Demonstration For 720P Video Resolution

    Exit any previously running applications. b. Type these commands at the Linux command prompt into the host PC based terminal: zynq> run_sobel.sh -cmd -res 1280x720 www.xilinx.com ZC702 and ZVIK Getting Started Guide Send Feedback UG926 (v6.0) December 17, 2013...
  • Page 39 Running the Video Demonstration for 720p Video Resolution For additional example designs, tutorials, software, and other information related to the ZVIK, see Next Steps for the Zynq-7000 AP SoC Video and Imaging Kit (ZVIK), page ZC702 and ZVIK Getting Started Guide www.xilinx.com Send Feedback UG926 (v6.0) December 17, 2013...
  • Page 40 Chapter 3: Getting Started with the Base Targeted Reference Design www.xilinx.com ZC702 and ZVIK Getting Started Guide Send Feedback UG926 (v6.0) December 17, 2013...

  • Page 41: Chapter 4: Using The Ams101 Evaluation Card

    ZC702 evaluation kit includes the hardware and software to evaluate this ADC feature and to determine its usefulness in the user’s end system. For evaluation of Xilinx Agile Mixed Signal (AMS) capability, the following items in the kit are needed: •...

  • Page 42: Requirements To Get Started

    The GUI itself has been built using National Instruments LabVIEW 2011 software. To enable use of the GUI without the need for a LabVIEW license, Xilinx has bundled the LabVIEW run-time engine with the GUI installer. During the installation process, the run-time engine is installed on the PC.

  • Page 43: Evaluating Ams

    X-Ref Target - Figure 4-2 Done LED UG926_c4_02_061212 Figure 4-2: ZC702 Board with AMS101 Evaluation Card Plugged into XADC Header 2. Download the design to the Zynq-7000 AP SoC. a. Plug the card into the ZC702 board. SD MMC b. Set the ZC702 board switch settings to boot from SD mode (Figure 3-4).
  • Page 44 7]. For a more extensive explanation of the AMS targeted reference design for ZC702, refer to the 7 Series FPGA AMS Targeted Reference Design User Guide (UG960) [Ref www.xilinx.com ZC702 and ZVIK Getting Started Guide Send Feedback UG926 (v6.0) December 17, 2013...

  • Page 45: Chapter 5: Next Steps

    Zynq-7000 AP SoC ZC702 Evaluation Kit product page Next Steps for the Zynq-7000 AP SoC Video and Imaging Kit (ZVIK) For more information on additional example designs (including a camera design), tutorials,...
  • Page 46 Chapter 5: Next Steps www.xilinx.com ZC702 and ZVIK Getting Started Guide Send Feedback UG926 (v6.0) December 17, 2013...
  • Page 47 Zynq-7000 AP SoC ZC702 Evaluation Kit documentation page Zynq-7000 AP SoC Video and Imaging Kit product page Zynq-7000 AP SoC Video and Imaging Kit documentation page Zynq-7000 SoC ZC702 Evaluation Kit Master Answer Record (AR 47864) ZC702 and ZVIK Getting Started Guide www.xilinx.com Send Feedback UG926 (v6.0) December 17, 2013...
  • Page 48 Zynq-7000 All Programmable SoC Product Table 2. Zynq-7000 All Programmable SoC: Concepts, Tools, and Techniques (UG873) Avnet product page 4. ZC702 Evaluation Board for the Zynq-7000 XC7Z020 All Programmable SoC User Guide (UG850) Tera Term home page Silicon Labs USB-UART drivers page 7.
  • Page 49 Customer. For any breach by Xilinx of this limited warranty, the exclusive remedy of Customer and the sole liability of Xilinx shall be, at the option of Xilinx, to replace or repair the affected products, or to refund to Customer the price of the affected products. The availability of replacement products is subject to product discontinuation policies at Xilinx.
  • Page 50 Appendix B: Warranty www.xilinx.com ZC702 and ZVIK Getting Started Guide Send Feedback UG926 (v6.0) December 17, 2013...

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