Xilinx Zynq-7000 User Manual page 318

The PHY is composed of these elements, as shown in
• User interface
• Physical interface
a. Write path
b. Read datapath
X-Ref Target - Figure 2-39
Client Interface
clk_wr
ck_mem
clk
sys_rst
rst_dk
mmcm_locked
iodelay_ctrl_rdy
User
Device
app_wr_cmd
app_rd_cmd
app_wr_addr
app_rd_addr
app_wr_data
app_wr_bw_n
app_rd_valid
app_rd_data
init_calib_complete
Figure 2-39: Components of the QDR II+ SRAM Memory Interface Solution
Zynq-7000 AP SoC and 7 Series FPGAs MIS v4.1
UG586 November 30, 2016
Chapter 2: QDR II+ Memory Interface Solution
Figure
Reset Clock
Module Generation
Write Path
Read Path
phy_top
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2-39:
Physical Interface
qdr_k_p
qdr_k_n
qdr_dll_off_n
QDR II+ SRAM
Device
qdr_w_n
qdr_r_n
qdr_sa
qdr_d
qdr_bw_n
qdr_cq_p
qdr_cq_n
qdr_q
user_top
UG586_c2_35_090911
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