Xilinx Zynq-7000 User Manual page 540

Vivado Integrated Design Flow for MIG
1. After clicking Generate, the Generate Output Products window appears. This window
has the Out-of-Context Settings as shown in
X-Ref Target - Figure 4-27
Zynq-7000 AP SoC and 7 Series FPGAs MIS v4.1
UG586 November 30, 2016
Chapter 4: LPDDR2 SDRAM Memory Interface Solution
Figure 4-27: Generate Output Products Window
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Figure 4-27.
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