Xilinx Zynq-7000 User Manual page 384

Memory interface solutions
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X-Ref Target - Figure 3-7
8. Click Next to proceed to the Default Part page
needs to be targeted can be selected. The Default Part page appears as shown in
Figure
3-8.
X-Ref Target - Figure 3-8
Zynq-7000 AP SoC and 7 Series FPGAs MIS v4.1
UG586 November 30, 2016
Chapter 3: RLDRAM II and RLDRAM 3 Memory Interface Solutions
Figure 3-7: Add Constraints (Optional)
Figure 3-8: Default Part (Default Window)
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(Figure
3-8) where the device that
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