Table 13-9 Integration Test Register Bit Assignments; Figure 13-8 Integration Test Register Bit Assignments - ARM Cortex-M3 Technical Reference Manual

Field Name
[31:1] -
[0] ATVALID1, ATVALID2
ARM DDI 0337B
Integration Test Register-ITATBCTR0
The register address, access type, and Reset state are:
Address
0xE0040EF8
Access Read only
Reset state
0x0
Figure 13-8 shows the fields of the Integration Test Register bit assignments.
Table 13-9 describes the fields of the Integration Test Register bit assignments.
Definition
Reserved
This bit reads or sets the value of ATVALIDS1 OR-ed with ATVALIDS2.
Copyright © 2005, 2006 ARM Limited. All rights reserved.

Figure 13-8 Integration Test Register bit assignments

Table 13-9 Integration Test Register bit assignments

Trace Port Interface Unit
13-13