Table 12-23 Bit Assignments For The Wire Control Register (Sw-Dp Only); Table 12-24 Turnaround Tri-State Period Field, Turnround, Bit Definitions - ARM Cortex-M3 Technical Reference Manual

Bits Function
[31:10] -
[9:8] TURNROUND
[7:6] WIREMODE
[5:3] -
[2:0] Reserved
ARM DDI 0337B
Table 12-23 lists the bit functions of the Wire Control Register.

Table 12-23 Bit assignments for the Wire Control Register (SW-DP only)

Description
Reserved. SBZ/RAZ.
Turnaround tri-state period, see Turnaround tri-state period, TURNROUND, bits [9:8].
After a reset this field is b00.
Identifies the operating mode for the wire connection to the DP, see Wire operating mode,
WIREMODE, bits [7:6].
After a reset this field is b01.
Reserved. SBZ/RAZ.
-
Turnaround tri-state period, TURNROUND, bits [9:8]
This field defines the turnaround tri-state period. This turnaround period allows for pad
delays when using a high sample clock frequency. Table 12-24 lists the allowed values
of this field, and their meanings.

Table 12-24 Turnaround tri-state period field, TURNROUND, bit definitions

Wire operating mode, WIREMODE, bits [7:6]
This field identifies SW-DP as operating in Synchronous mode only.
Copyright © 2005, 2006 ARM Limited. All rights reserved.
a Turnaround tri-state period
TURNROUND
b00 1 sample period.
b01 2 sample periods.
b10 3 sample periods.
b11 4 sample periods.
a. Bits [9:8] of the WCR Register.
Debug Port
12-61