Table 8-2 Interrupt Controller Type Register Bit Assignments; Figure 8-2 Systick Control And Status Register Bit Assignments - ARM Cortex-M3 Technical Reference Manual

Nested Vectored Interrupt Controller
Field
[31:5]
[4:0]
8-8
Table 8-2 describes the fields of the Interrupt Controller Type Register.
Name Definition
- Reserved.
INTLINESNUM Total number of interrupt lines in groups of 32:
b00000 = 0...32*
b00001 = 33...64
b00010 = 65...96
b00011 = 97...128
b00100 = 129...160
b00101 = 161...192
b00110 = 193...224
b00111 = 225...256*
*Cortex-M3 processor only supports between 1 and 240 external interrupts.
SysTick Control and Status Register
Use the SysTick Control and Status Register to enable the SysTick features.
The register address, access type, and Reset state are:
Address
0xE000E010
Access Read/write
Reset state 0x00000000
Figure 8-2 shows the fields of the SysTick Control and Status Register.

Figure 8-2 SysTick Control and Status Register bit assignments

Copyright © 2005, 2006 ARM Limited. All rights reserved.

Table 8-2 Interrupt Controller Type Register bit assignments

ARM DDI 0337B