Table of Contents
Advertisement
Debug Port
12-14
•
If RnW is shifted in as 1, the request is to read the value of the addressed register.
The value in DATAIN[31:0] is ignored. You must read the scan chain again to
obtain the value read from the register.
The required register is addressed:
•
In the case of a DPACC access, to read a DP register, by the value shifted into
A[3:2]. See JTAG-DP register map on page 12-47 for the addressing details.
•
In the case of a APACC access, to read an AP register, by the combination of:
—
the value shifted into A[3:2]
—
the current value of the SELECT register in the DP, see The AP Select
Register, SELECT on page 12-57.
For details of the register addressing, see:
—
Table 11-27 on page 11-35, if you want to access an AHB-AP register
Register accesses can be pipelined, because a single DPACC or APACC scan can return
the result of the previous read operation at the same time as requesting another register
access. At the end of a sequence of pipelined register reads, you can read the DP
RDBUFF Register to return the result of the final register read. Reading the DP
RDBUFF Register is benign, that is, it has no effect on the operation of the JTAG, see
The Read Buffer, RDBUFF on page 12-59. The section Target response summary on
page 12-16 gives more information about how one DPACC or APACC scan returns the
result from the previous scan.
If the current IR instruction is APACC, causing an APACC access:
•
If any sticky flag is set in the DP CTRL/STAT Register, the transaction is
discarded. The next scan returns an OK/FAULT response immediately. For more
information see Sticky flags and DP error responses on page 12-41, and The
Control/Status Register, CTRL/STAT on page 12-53.
•
If pushed compare or pushed verify operations are enabled then the scanned-in
value of RnW must be 0, otherwise behavior is Unpredictable. On Update-DR, a
read request is issued, and the returned value compared against DATAIN[31:0].
The STICKYCMP flag in the DP CTRL/STAT register is updated based on this
comparison. For more information see Pushed compare and pushed verify
operations on page 12-44. Pushed operations are enabled using the TRNMODE
field of the DP CTRL/STAT register, see The Control/Status Register, CTRL/STAT
on page 12-53 for more information.
Copyright © 2005, 2006 ARM Limited. All rights reserved.
ARM DDI 0337B
Advertisement
Table of Contents
