Table 2-1 Application Program Status Register Bit Assignments; Figure 2-3 Interrupt Program Status Register Bit Assignments - ARM Cortex-M3 Technical Reference Manual

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Programmer's Model
2-6
Table 2-1 describes the fields of the APSR.

Table 2-1 Application Program Status Register bit assignments

Interrupt PSR
The Interrupt PSR (IPSR) contains the ISR number of the current exception activation.
Figure 2-2 on page 2-5 shows the fields of the IPSR.

Figure 2-3 Interrupt Program Status Register bit assignments

Copyright © 2005, 2006 ARM Limited. All rights reserved.
Field
Name
Definition
[31]
N
Negative or less than flag:
1 = result negative or less than
0 = result positive or greater than.
[30]
Z
Zero flag:
1 = result of 0
0 = nonzero result.
[29]
C
Carry/borrow flag:
1 = carry or borrow
0 = no carry or borrow.
[28]
V
Overflow flag:
1 = overflow
0 = no overflow.
[27]
Q
Sticky saturation flag.
[26:0]
-
Reserved.
ARM DDI 0337B

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