Etm Resources - ARM Cortex-M3 Technical Reference Manual

15.3

ETM Resources

15.3.1 Periodic synchronization
15.3.2 Data and instruction address compare resources
ARM DDI 0337B
Because the ETM does not generate data trace information, the lower bandwidth
reduces the requirement for complex triggering capabilities. This means that the ETM
does not include the following:
• internal comparators
• counters
• sequencers.
The Nested Vectored Interrupt Controller (NVIC) contains a 12-bit counter that can
write the PC value to the DWT. This counter is used to create periodic synchronization
packets for the ETM.
The DWT provides four address comparators on the data bus which are used to provide
debug functionality. Within the DWT unit, the functions triggered by a match can be
specified, and one of these functions is to generate an ETM match input. These inputs
are presented to the ETM as Embedded ICE comparator inputs.
A single DWT resource can trigger an ETM event and also generate instrumentation
trace directly from the same event.
The four DWT comparators can also be individually configured to compare with the
execute PC to allow the ETM access to a PC compare resource. These inputs are
presented to the ETM as Embedded ICE comparator inputs.
Note
Using a DWT comparator as a PC comparator reduces the number of available data
address comparisons.
See Data Watchpoint and Trace on page 11-12 for more information about the DWT
unit.
External inputs
Two external inputs, ETMEXTIN[1:0], enable additional on-chip IP to generate
trigger/enable signals for the ETM.
Copyright © 2005, 2006 ARM Limited. All rights reserved.
Embedded Trace Macrocell
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