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System Debug
11.4
Flash Patch and Breakpoint
11-6
The Flash Patch and Breakpoint unit (FPB):
•
implements hardware breakpoints
•
patches code and data from code space to system space.
The FPB unit contains:
•
Two literal comparators, for matching against literal loads from Code space and
remapping to a corresponding area in System space.
•
Six instruction comparators, for matching against instruction fetches from Code
space and remapping to a corresponding area in System space. Alternatively, the
comparators can be individually configured to return a breakpoint instruction
(BKPT) to the processor core on a match, so providing hardware breakpoint
capability.
The FPB contains a global enable, but also individual enables for the eight comparators.
If the comparison for an entry matches, the address is remapped to the address set in the
remap register plus an offset corresponding to the comparator which matched, or is
remapped to a BKPT instruction if that feature is enabled. The comparison happens on
the fly, but the result of the comparison is too late to stop the original instruction fetch
or literal load taking place from the Code space. The processor ignores this transaction
however, and only the remapped transaction is used.
If an MPU is present, the MPU lookups are performed for the original address, not the
remapped address.
Note
Unaligned literal accesses are not remapped. The original access to the DCode bus takes
place in this case.
Note
Load exclusives are UNPREDICTABLE to the FPB. The address is remapped but the
access does not take place as an exclusive load.
Note
Remapping to the bit-band alias directly accesses the alias address, and does not remap
to the bit-band region.
Copyright © 2005, 2006 ARM Limited. All rights reserved.
ARM DDI 0337B
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