ARM Cortex-M3 Technical Reference Manual page 282

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Debug Port
12-32
Access Port write buffering
The SW-DP implements a write buffer, that enables it to accept write operations even
when other transactions are still outstanding. The DP issues an OK response to a write
request if it can accept the write into its write buffer. This means that an OK response
to a write request, other than a write to the DP ABORT Register, indicates only that the
write has been accepted by the DP. It does not indicate that all previous transactions
have completed.
If a write is accepted into the write buffer but later abandoned then the WDATAERR
flag is set in the CTRL/STAT Register, see The Control/Status Register, CTRL/STAT on
page 12-53. A buffered write is abandoned if:
A sticky flag is set by a previous transaction.
A DP read of the IDCODE or CTRL/STAT Register is made. Because the DP is
not permitted to stall reads of these registers, it must:
perform the IDCODE or CTRL/STAT Register access immediately
discard any buffered writes, because otherwise they would be performed
out-of-order.
A DP write of the ABORT Register is made. Again, this is because the DP cannot
stall an ABORT Register access.
This means that if you make a series of AP write transactions, it might not be possible
to determine which transaction failed from examining the ACK responses. However it
might be possible to use other enquiries to find which write failed. For example, if you
are using the auto-address increment (AddrInc) feature of a Memory Access Port
(AHB-AP), then you can read the Transfer Address Register to find which was the final
successful write transaction. See AHB-AP Transfer Address Register on page 11-38 and
Summary and description of the AHB-AP registers on page 11-35 for more information.
The write buffer must be emptied before the following operations can be performed:
any AP read operation
any DP operation other than a read of the IDCODE or CTRL/STAT Register, or a
write of the ABORT Register.
Attempting these operations causes WAIT responses from the DP, until the write buffer
is empty.
Copyright © 2005, 2006 ARM Limited. All rights reserved.
ARM DDI 0337B

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