Table 12-15 Abort Register Bit Assignments; Figure 12-20 Abort Register Bit Assignments - ARM Cortex-M3 Technical Reference Manual

Debug Port
Bits Function
[31:5] -
a
[4] ORUNERRCLR
a
[3] WDERRCLR
a
[2] STKERRCLR
a
[1] STKCMPCLR
[0] DAPABORT
a. Implemented on SW-DP only. On a JTAG-DP this bit is Reserved, SBZ.
b. In the Control/Status register.
12-50
It is:
• A write-only register.
• Always accessible, and returns an OK response if a valid transaction is received.
Abort Register accesses always complete on the first attempt.
Figure 12-20 shows the register bit assignments.
Table 12-15 lists the bit functions of the Abort Register.
Description
Reserved, SBZ.
a
Write b1 to this bit to clear the STICKYORUN overrun error flag
a
Write b1 to this bit to clear the WDATAERR write data error flag
a
Write b1 to this bit to clear the STICKYERR sticky error flag
a
Write b1 to this bit to clear the STICKYCMP sticky compare flag
Write b1 to this bit to generate a DAP abort. This aborts the current AP transaction.
This should only be done if the debugger has received WAIT responses over an extended
period.
DP Aborts
Writing b1 to bit [0] of the Abort Register generates a DP abort, causing the current AP
transaction to abort. This also terminates the Transaction Counter, if it was active.
Copyright © 2005, 2006 ARM Limited. All rights reserved.

Figure 12-20 Abort Register bit assignments

Table 12-15 Abort Register bit assignments

b
b
.
b
.
.
b
.
ARM DDI 0337B