ARM Cortex-M3 Technical Reference Manual page 237

Name
Integration Write
Integration Read
Integration Mode Control
Lock Access Register
Lock Status Register
PERIPHID4
PERIPHID5
PERIPHID6
PERIPHID7
PERIPHID0
PERIPHID1
PERIPHID2
PERIPHID3
PCELLID0
PCELLID1
PCELLID2
PCELLID3
ARM DDI 0337B
Type Address
Write-only
0xE0000EF8
Read-only
0xE0000EFC
Read/write 0xE0000F00
0xE0000FB0
Write-only
0xE0000FB4
Read-only
0xE0000FD0
Read-only
0xE0000FD4
Read-only
0xE0000FD8
Read-only
0xE0000FDC
Read-only
0xE0000FE0
Read-only
0xE0000FE4
Read-only
0xE0000FE8
Read-only
Read-only 0xE0000FEC
0xE0000FF0
Read-only
0xE0000FF4
Read-only
0xE0000FF8
Read-only
0xE0000FFC
Read-only
Note
ITM registers are fully accessible in Privileged mode. In User mode, all registers can be
read, but only the Stimulus Registers and Trace Enable Registers can be written, and
only when the corresponding Trace Privilege Register bit is set. Invalid User mode
writes to the ITM registers is discarded.
Copyright © 2005, 2006 ARM Limited. All rights reserved.
Table 11-18 ITM register summary (continued)
Reset
Description
value
See ITM Integration Write Register
0x00000000
on page 11-31
See ITM Integration Read Register
0x00000000
on page 11-32
0x00000000 See ITM Integration Mode Control
Register on page 11-32
See ITM Lock Access Register on
0x00000000
page 11-33
See ITM Lock Status Register on
0x00000003
page 11-33
0x00000004
Value 0x04
0x00000000
Value 0x00
0x00000000
Value 0x00
0x00000000
Value
0x00
0x00000002
Value
0x01
0x000000B0
Value
0xB0
0x0000000B
Value
0x0B
0x00000000 Value
0x00
0x0000000D
Value 0x0D
0x000000E0
Value
0xE0
0x00000005
Value
0x05
0x000000B1
Value
0xB1
System Debug
11-27