ARM Cortex-M3 Technical Reference Manual page 43

Operation
Memory halfword from PC address immediate 12-bit offset
Memory signed byte [7:0] from base register address +
immediate 12-bit offset
Memory signed byte [7:0] from base register address
immediate 8-bit offset, postindexed
Memory signed byte [7:0] from base register address
immediate 8-bit offset, preindexed
Memory signed byte [7:0] from register address shifted left by
0, 1, 2, or 3 places
Memory signed byte from PC address immediate 12-bit offset
Memory signed halfword [15:0] from base register address +
immediate 12-bit offset
Memory signed halfword [15:0] from base register address
immediate 8-bit offset, postindexed
Memory signed halfword [15:0] from base register address
immediate 8-bit offset, preindexed
Memory signed halfword [15:0] from register address shifted
left by 0, 1, 2, or 3 places
Memory signed halfword from PC address immediate 12-bit
offset
Logical shift left register value by number in register
Logical shift right register value by number in register
Multiply two signed or unsigned register values and add the
low 32 bits to a register value
Multiply two signed or unsigned register values and subtract
the low 32 bits from a register value
Move immediate 12-bit value to register
Move shifted register value to register
Move immediate 16-bit value to top halfword [31:16] of
register
ARM DDI 0337B
Table 1-2 32-bit Cortex-M3 instruction summary (continued)
Copyright © 2005, 2006 ARM Limited. All rights reserved.
Assembler
LDRH.W <Rxf>, [PC, #+/–<offset_12>]
LDRSB.W <Rxf>, [<Rn>, #<offset_12>]
LDRSB.W <Rxf>. [<Rn>], #+/-<offset_8>
LDRSB.W <Rxf>, [<Rn>, #<+/–<offset_8>]
LDRSB.W <Rxf>, [<Rn>, <Rm>{, LSL #<shift>}]
LDRSB.W <Rxf>, [PC, #+/–<offset_12>]
LDRSH.W <Rxf>, [<Rn>, #<offset_12>]
LDRSH.W <Rxf>. [<Rn>], #+/-<offset_8>
LDRSH.W <Rxf>, [<Rn>, #<+/–<offset_8>]
LDRSH.W <Rxf>, [<Rn>, <Rm>{, LSL #<shift>}]
LDRSH.W <Rxf>, [PC, #+/–<offset_12>]
LSL{S}.W <Rd>, <Rn>, <Rm>
LSR{S}.W <Rd>, <Rn>, <Rm>
MLA.W <Rd>, <Rn>, <Rm>, <Racc>
MLS.W <Rd>, <Rn>, <Rm>, <Racc>
MOV{S}.W <Rd>, #<modify_constant(immed_12)>
MOV{S}.W <Rd>, <Rm>{, <shift>}
MOVT.W <Rd>, #<immed_16>
Introduction
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