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Embedded Trace Macrocell
Name
ITATBCTR2
ITATBCTR0
Integration Mode Control
Claim Tag
Lock Access
Authentication Status
Device Type
Peripheral ID 4
Peripheral ID 5
Peripheral ID 6
Peripheral ID 7
Peripheral ID 0
Peripheral ID 1
Peripheral ID 2
Peripheral ID 3
Component ID 0
Component ID 1
Component ID 2
Component ID 3
15.6.3
Description of ETM registers
15-16
Type
RO
WO
R/W
R/W
WO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
An additional description of some of the ETM registers is given in the following
sections. For full details, see the ARM Embedded Trace Macrocell Architecture
Specification.
Copyright © 2005, 2006 ARM Limited. All rights reserved.
Address
Present
0xE0041EF0
Yes
0xE0041EF8
Yes
0xE0041F00
Yes
0xE0041FA0-
Yes
0xE0041FA4
0xE0041FB0-
Yes
0xE0041FB4
0xE0041FB8
Yes
0xE0041FCC
Yes
0xE0041FD0
Yes
0xE0041FD4
Yes
0xE0041FD8
Yes
0xE0041FDC
Yes
0xE0041FE0
Yes
0xE0041FE4
Yes
0xE0041FE8
Yes
0xE0041FEC
Yes
0xE0041FF0
Yes
0xE0041FF4
Yes
0xE0041FF8
Yes
0xE0041FFC
Yes
Table 15-3 ETM registers
Description
Sets [0] to ATREADY.
Sets [0] to ATVALID.
Implemented as normal.
Implements the 4-bit claim tag.
Implemented as normal.
Implemented as normal.
Reset value:
0x13.
0x04
0x00
0x00
0x00
0x24
0xb9
0x0b
0x00
0x0d
0x90
0x05
0xb1
ARM DDI 0337B
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