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System Debug
Field
Name
[31:12]
-
[11:8]
NUM_LIT
[7:4]
NUM_CODE
[3:2]
-
[1]
KEY
[0]
ENABLE
11-8
Flash Patch Control Register
Use the Flash Patch Control Register to enable the flash patch block.
The register address, access type, and Reset state are:
Address
0xE0002000
Access
Read/write
Reset state
Bit[0] (ENABLE) is reset to 1'b0.
Figure 11-2 shows the fields of the Flash Patch Control Register.
Table 11-2 describes the fields of the Flash Patch Control Register.
Definition
Reserved. Read As Zero. Write Ignored.
Number of literal slots field. This read only field contains b0010 to indicate that there are two
literal slots.
Number of code slots field. This read only field contains b0110 to indicate that there are six
code slots.
Reserved.
Key field. To write to the Flash Patch Control Register, you must write a 1 to this write-only
bit.
Flash patch unit enable bit:
1 = flash patch unit enabled
0 = flash patch unit disabled.
Reset clears the ENABLE bit.
Copyright © 2005, 2006 ARM Limited. All rights reserved.
Figure 11-2 Flash Patch Control Register bit assignments
Table 11-2 Flash Patch Control Register bit assignments
ARM DDI 0337B
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