Table 11-22 Bit Functions Of The Itm Integration Write Register; Table 11-23 Bit Functions Of The Itm Integration Read Register; Figure 11-16 Itm Integration Read Register Bit Assignments - ARM Cortex-M3 Technical Reference Manual

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Table 11-22 describes the fields of the ITM Integration Write Register.

Table 11-22 Bit functions of the ITM Integration Write Register

Note
ATVALIDM is driven by bit 0 when mode is set.
ITM Integration Read Register
Use this register to read the value on ATREADYM
Figure 11-16 shows the ITM Integration Read Register bit assignments.
Table 11-23 describes the fields of the ITM Integration Read Register.

Table 11-23 Bit functions of the ITM Integration Read Register

ITM Integration Mode Control Register
Use this register to enable write accesses to the Control Register.
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Field Name
[31:1] -
[0] ATVALIDM

Figure 11-16 ITM Integration Read Register bit assignments

Field
[31:1]
[0]
Definition
Reserved
When the integration mode is set:
0 = ATVALIDM clear
1 = ATVALIDM set.
Name Definition
- Reserved
ATREADYM Value on ATREADYM
ARM DDI 0337B