Table 3-10 Etm Registers - ARM Cortex-M3 Technical Reference Manual

Hide thumbs Also See for Cortex-M3:
Table of Contents

Advertisement

3.1.7
Embedded Trace Macrocell registers
Name
ETM Control
Configuration Code
Trigger event
ASIC Control
ETM Status
System Configuration
TraceEnable
TraceEnable Event
TraceEnable Control 1
FIFOFULL Region
FIFOFULL Level
ViewData
Address Comparators
Counters
Sequencer
External Outputs
CID Comparators
Implementation specific
Synchronization Frequency
ETM ID
Configuration Code Extension
Extended External Input Selector
ARM DDI 0337B
Table 3-10 gives a summary of the Embedded Trace Macrocell (ETM) registers. For a
detailed description of the ETM registers, see Chapter 15 Embedded Trace Macrocell.
Copyright © 2005, 2006 ARM Limited. All rights reserved.
Type
Read/write
Read-only
Write-only
Write-only
Read-only or read/write
Read-only
Write-only
Write-only
Write-only
Write-only
Write-only or read/write
Write-only
Write-only
Write-only
Read/write
Write-only
Write-only
Write-only
Write-only
Read-only
Read-only
Write-only
System Control

Table 3-10 ETM registers

Address
0xE0041000
0xE0041004
0xE0041008
0xE004100C
0xE0041010
0xE0041014
0xE0041018, 0xE004101C
0xE0041020
0xE0041024
0xE0041028
0xE004102C
0xE0041030-0xE004103C
0xE0041040- 0xE004113C
0xE0041140-0xE004157C
0xE0041180-
0xE0041194, 0xE0041198
0xE00411A0-0xE00411AC
0xE00411B0-0xE00411BC
0xE00411C0-0xE00411DC
0xE00411E0
0xE00411E4
0xE00411E8
0xE00411EC
Present
Yes
Yes
Yes
No
Yes
Yes
No
Yes
Yes
No
Yes
No
No
No
No
No
No
No
No
Yes
Yes
No
3-13

Advertisement

Table of Contents
loading

Table of Contents