ARM Cortex-M3 Technical Reference Manual page 358

Hide thumbs Also See for Cortex-M3:
Table of Contents

Advertisement

Embedded Trace Macrocell
15-18
Only bit 25 is implemented. It controls the start/stop resource controls tracing.
ETM ID Register
The ETM ID Register holds the ETM architecture variant, and precisely defines the
Programmer's Model for the ETM.
Reset value:
0x4114F240
This indicates:
ARM implementor.
Special branch encoding. Affects bits 7:6 of each byte.
Thumb-2 supported.
Core family is found elsewhere.
ETMv3.4.
Implementation revision 0.
Configuration Code Extension Register
The Configuration Code Extension Register holds additional bits for ETM
configuration code. It describes the extended external inputs.
Reset value:
0x00018800
This register indicates:
start/stop block uses E-ICE inputs
four embedded ICE inputs
no data comparisons supported
all registers are readable
no extended external input supported.
Copyright © 2005, 2006 ARM Limited. All rights reserved.
ARM DDI 0337B

Advertisement

Table of Contents
loading

Table of Contents