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Debug Port
Line interface
SW-DP uses a serial wire for both host and target sourced signals. The host emulator
drives the protocol timing - only the host emulator generates packet headers.
SW-DP operates in synchronous mode, and requires a clock pin and a data pin.
Synchronous mode uses a clock reference signal, which can be sourced from an on-chip
source and exported, or provided by the host device. This clock is then used by the host
as a reference for generation and sampling of data so that the target is not required to
perform any oversampling.
Both the target and host are capable of driving the bus HIGH and LOW, or tristating it.
The ports must be able to tolerate short periods of contention to allow for loss of
synchronization.
Line pullup
Both the host and target are able to drive the line HIGH or LOW, so it is important to
ensure that contention does not occur by providing undriven time slots as part of the
handover. So that the line can be assumed to be in a known state when neither is driving
the line, a 100kOhm pullup is required at the target, but this can only be relied on to
maintain the state of the wire. If the wire is driven LOW and released, the pullup resistor
eventually brings the line to the HIGH state, but this takes many bit periods.
The pullup is intended to prevent false detection of signals when no host device is
connected. It must be of a high value to reduce IDLE state current consumption from
the target when the host actively pulls down the line.
Note
Whenever the line is driven LOW, this results in a small current drain from the target. If
the interface is left connected for extended periods when the target has to use a low
power mode, the line must be held HIGH, or reset, by the host until the interface must
be activated.
Line turn-round
To avoid contention, a turnaround period is required when the device driving the wire
changes.
ARM DDI 0337B
Copyright © 2005, 2006 ARM Limited. All rights reserved.
12-21
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