ARM Cortex-M3 Technical Reference Manual page 80

Memory Map
4-4
Name
External Device
External Device
Private Peripheral Bus
System
Note
Private Peripheral Bus and System space at
XN. This cannot be overridden by the Memory Protection Unit (MPU).
For a description of the processor bus interfaces, see Chapter 14 Bus Interface.
Copyright © 2005, 2006 ARM Limited. All rights reserved.
Table 4-2 Memory region permissions (continued)
Region
0xA0000000-0xBFFFFFFF
0xC0000000-0xDFFFFFFF
0xE0000000-0xE00FFFFF
0xE0100000-0xFFFFFFFF
0xE0100000 - 0xFFFFFFFF
Device type XN Cache
Device XN Shared
Device XN -
SO XN -
Device XN -
are permanently
ARM DDI 0337B