ARM Cortex-M3 Technical Reference Manual page 194

Memory Protection Unit
9-18
MOV R0,#NVIC_BASE
ADD R0,#MPU_REG_CTRL
STM R0,{R1-R3}
This can be done in two words for pre-packed information. This means that the base
address register contains the region number in addition to a region-valid bit. This is
useful when the data is statically packed, for example in a boot list or a PCB.
; R1 = address and region number in one
; R2 = size and attributes in one
MOV R0,#NVIC_BASE
ADD R0,#MPU_REG_CTRL
STR R1,[R0,#4]
STR R2,[R0,#8]
This can be optimized using an STM:
; R1 = address and region number in one
; R2 = size and attributes in one
MOV R0,#NVIC_BASE
ADD R0,#MPU_REG_CTRL
STM R0,{R1-R2}
For information about interrupts and updating the MPU, see Interrupts and updating the
MPU on page 9-19.
Copyright © 2005, 2006 ARM Limited. All rights reserved.
; region number, address, size, and attributes
; address and region number
; size and attributes
; address, region number, size
ARM DDI 0337B