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Bus Interface
14.7
Unaligned accesses that cross regions
14-10
The CM3Core supports ARMv6 unaligned accesses. All accesses are performed as
single, unaligned accesses by the CM3Core, and are converted into two or more aligned
accesses by the DCode and System bus interfaces.
Note
All Cortex-M3 external accesses are aligned.
Unaligned support is only available for load/store singles (LDR, STR). Load/store
double already supports word aligned accesses, but does not permit other unaligned
accesses, and generates a fault if this is attempted.
Unaligned accesses that cross memory map boundaries are architecturally
unpredictable. The processor behavior is boundary dependent, as follows:
•
DCode accesses wrap within the region. For example, an unaligned halfword
access to the last byte of Code space (
interface into a byte access to
•
System accesses that cross into PPB space do not wrap within System space. For
example, an unaligned halfword access to the last byte of System space
(
) is converted by the System interface into a byte access to
0xDFFFFFFF
followed by a byte access to
System bus.
•
System accesses that cross into Code space do not wrap within System space. For
example, an unaligned halfword access to the last byte of System space
(
) is converted by the System interface into a byte access to
0xFFFFFFFF
followed by a byte access to
System bus.
•
Unaligned accesses are not supported to PPB space, and so there are no boundary
crossing cases for PPB accesses.
Unaligned accesses that cross into the bit-band alias regions are also architecturally
unpredictable. The processor performs the access to the bit-band alias address, but this
does not result in a bit-band operation. For example, an unaligned halfword access to
is performed as a byte access to
0x21FFFFFF
(the first byte of the bit-band alias).
0x22000000
Unaligned loads that match against a literal comparator in the FPB are not remapped.
FPB only remaps aligned addresses.
Copyright © 2005, 2006 ARM Limited. All rights reserved.
) is converted by the DCode
0x1FFFFFFF
followed by a byte access to
0x1FFFFFFF
.
0xE0000000
0xE0000000
.
0x00000000
0x00000000
followed by a byte access to
0x21FFFFFF
0x00000000
0xDFFFFFFF
is not a valid address on the
0xFFFFFFFF
is not a valid address on the
ARM DDI 0337B
.
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