ARM Cortex-M3 Technical Reference Manual page 279

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ARM DDI 0337B
Operation and use of the READOK flag
The SW-DP CTRL/STAT register includes a READOK flag, bit [6]. This register is
described in The Control/Status Register, CTRL/STAT on page 12-53.
The READOK flag is updated on every AP read access, and on every RDBUFF read
request. When the SW-DP initiates the AP access it clears the READOK flag to 0, and
when the SW-DP target gives an OK response to the read request it sets the READOK
flag to 1.
This means that if a host receives a corrupted ACK response to an AP or RDBUFF read
request it can check whether the read actually completed correctly. The host can read
the DP CTRL/STAT Register to find the value of the READOK flag:
If the flag is set to 1 then the read was performed correctly. The host can use a
RESEND request to obtain the read result, see The Read Resend Register,
RESEND (SW-DP only) on page 12-62.
If the flag is set to 0 then the read was not successful. The host must retry the
original AP or RDBUFF read request.
The WAIT response
A WAIT response is issued by the SW-DP if it is not able to process immediately the
request from the debugger. However, a WAIT response must not be issued to the
following requests. SW-DP must always be able to process these three requests
immediately:
a read of the IDCODE register, see The Identification Code Register, IDCODE on
page 12-52
a read of the CTRL/STAT register, see The Control/Status Register, CTRL/STAT
on page 12-53
a write to the ABORT register, see The Abort Register, ABORT on page 12-49.
With any request other than those listed, the SW-DP issues a WAIT response, with no
data phase, if it cannot process the request. This happens:
if a previous AP or DP access is outstanding
if the new request is an AP read request and the result of the previous AP read is
not yet available.
Copyright © 2005, 2006 ARM Limited. All rights reserved.
Debug Port
12-29

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