Table 12-10 Target Response Summary For Ap Write Transaction Requests - ARM Cortex-M3 Technical Reference Manual

Debug Port
Sticky
ADDR [3:2]
flag set?
bXX No
bXX No
bXX Yes
a. Writes might be accepted when other transactions are still outstanding, These writes might be abandoned subsequently.
See Access Port write buffering on page 12-32 for more information.
b. If Pushed Verify or Pushed Compare is enabled, the write is converted to a read of the addressed AP register, and the
value returned by this read is compared with the supplied WDATA value, see Pushed compare and pushed verify
operations on page 12-44 for more information. For an outline of how AP registers are addressed see footnote
table.
c. The AP register is addressed by the value of A[3:2] together with the value of the APBANKSEL field in the SELECT
Register in the DP See The AP Select Register, SELECT on page 12-57.
d. See Sticky overrun behavior on page 12-30 for details of data phase when overrun detection is enabled.
12-36

Table 12-10 Target response summary for AP write transaction requests

SW-DP (target) response
AP
Ready?
ACK
a OK
Yes
No WAIT
X FAUL
T
Fault conditions not included in the target response tables
There are two fault conditions that are not included in possible operation requests listed
in Table 12-7 on page 12-33 and Table 12-9 on page 12-35:
Protocol fault
If there is a protocol fault in the operation request then the target does not
respond to the request at all. This means that when the host expects an
ACK response, it finds that the line is not driven.
WDATA fails parity check (write operations only)
The ACK response of the DP is sent before the parity check is performed,
and can be found from Table 12-9 on page 12-35. When the parity check
is performed and fails, the WDATAERR flag is set in the CTRL/STAT
Register, see The Control/Status Register, CTRL/STAT on page 12-53.
Summary of host responses
Every access by a debugger to a SW-DP starts with an operation request. Summary of
target responses on page 12-33 listed all possible requests from a debugger, and
summarized how the SW-DP responds to each request.
Copyright © 2005, 2006 ARM Limited. All rights reserved.
Action
b
Normally , write WDATA value to the indicated AP register
No data phase, unless overrun detection is enabled
No data phase, unless overrun detection is enabled
c
.
d
.
d
.
c
to this
ARM DDI 0337B