Table 9-9 Cache Policy For Memory Attribute Encoding; Table 9-10 Ap Encoding; Table 9-11 Xn Encoding - ARM Cortex-M3 Technical Reference Manual

Hide thumbs Also See for Cortex-M3:
Table of Contents

Advertisement

Memory Protection Unit
AP[2:0]
Privileged permissions
000
No access
001
Read/write
010
Read/write
011
Read/write
100
Unpredictable
101
Read only
110
Read only
111
Read only
9-14
Table 9-9 describes the cache policy for memory attribute encoding.
Memory attribute encoding (AA and BB)
00
01
10
11
Table 9-10 describes the AP encoding.
User permissions
No access
No access
Read only
Read/write
Unpredictable
No access
Read only
Read only
Table 9-11 describes the XN encoding.
Copyright © 2005, 2006 ARM Limited. All rights reserved.

Table 9-9 Cache policy for memory attribute encoding

Descriptions
All accesses generate a permission fault
Privileged access only
Writes in user mode generate a permission fault
Full access
Reserved
Privileged read only
Privileged/user read only
Privileged/user read only
XN
0
1
Cache policy
Non-cacheable
Write back, write and read allocate
Write through, no write allocate
Write back, no write allocate

Table 9-10 AP encoding

Table 9-11 XN encoding

Description
All instruction fetches enabled
No instruction fetches enabled
ARM DDI 0337B

Advertisement

Table of Contents
loading

Table of Contents