Table of Contents
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Operation
Multiple register words to consecutive memory locations
Register word to register address + immediate 12-bit offset
Register word to register address immediate 8-bit offset,
postindexed
Register word to register address shifted by 0, 1, 2, or 3 places
Register word to register address immediate 8-bit offset,
preindexed Store, preindexed
Register byte [7:0] to register address immediate 8-bit offset,
preindexed
Register byte [7:0] to register address + immediate 12-bit
offset
Register byte [7:0] to register address immediate 8-bit offset,
postindexed
Register byte [7:0] to register address shifted by 0, 1, 2, or 3
places
Store doubleword, preindexed
Store doubleword, postindexed
Register halfword [15:0] to register address + immediate 12-bit
offset
Register halfword [15:0] to register address shifted by 0, 1, 2,
or 3 places
Register halfword [15:0] to register address immediate 8-bit
offset, preindexed
Register halfword [15:0] to register address immediate 8-bit
offset, postindexed
Subtract immediate 12-bit value from register value
Subtract shifted register value from register value
Subtract immediate 12-bit value from register value
Sign extend byte to 32 bits
ARM DDI 0337B
Table 1-2 32-bit Cortex-M3 instruction summary (continued)
Copyright © 2005, 2006 ARM Limited. All rights reserved.
Assembler
STM{IA|DB}.W <Rn>{!}, <registers>
STR.W <Rxf>, [<Rn>, #<offset_12>]
STR.W <Rxf>, [<Rn>], #+/–<offset_8>
STR.W <Rxf>, [<Rn>, <Rm>{, LSL #<shift>}]
STR{T}.W <Rxf>, [<Rn>, #+/–<offset_8>]{!}
STRB{T}.W <Rxf>, [<Rn>, #+/–<offset_8>]{!}
STRB.W <Rxf>, [<Rn>, #<offset_12>]
STRB.W <Rxf>, [<Rn>], #+/–<offset_8>
STRB.W <Rxf>, [<Rn>, <Rm>{, LSL #<shift>}]
STRD.W <Rxf>, <Rxf2>, [<Rn>, #+/–<offset_8> * 4]{!}
STRD.W <Rxf>, <Rxf2>, [<Rn>], #+/–<offset_8> * 4
STRH.W <Rxf>, [<Rn>, #<offset_12>]
STRH.W <Rxf>, [<Rn>, <Rm>{, LSL #<shift>}]
STRH{T}.W <Rxf>, [<Rn>, #+/–<offset_8>]{!}
STRH.W <Rxf>, [<Rn>], #+/–<offset_8>
SUB{S}.W <Rd>, <Rn>, #<modify_constant(immed_12)>
SUB{S}.W <Rd>, <Rn>, <Rm>{, <shift>}
SUBW.W <Rd>, <Rn>, #<immed_12>
SXTB.W <Rd>, <Rm>{, <rotation>}
Introduction
1-21
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