ARM Cortex-M3 Technical Reference Manual page 142

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Table of Contents

Nested Vectored Interrupt Controller

Name of register

ISAR1: ISA Feature register1

ISAR2: ISA Feature register2

ISAR3: ISA Feature register3

ISAR4: ISA Feature register4

Software Trigger Interrupt Register

Peripheral identification register (PERIPHID4)

Peripheral identification register (PERIPHID5)

Peripheral identification register (PERIPHID6)

Peripheral identification register (PERIPHID7)

Peripheral identification register Bits 7:0

Peripheral identification register Bits 15:8

Peripheral identification register Bits 23:16

Peripheral identification register Bits 31:24

Component identification register Bits 7:0

Component identification register Bits 15:8

Component identification register Bits 23:16

Component identification register Bits 31:24

a. Reset value depends on the number of interrupts defined.

Table 8-1 NVIC registers (continued)

ARM DDI 0337B