Table of Contents
Advertisement
Glossary
Write buffer
Glossary-12
the endianness that produces the desired byte addresses at all times, apart possibly from
very early in their reset handlers before they have set up the endianness, and that this
early part of the reset handler must use only aligned word memory accesses.
See also Byte-invariant.
A pipeline stage for buffering write data to prevent bus stalls from stalling the processor.
Copyright © 2005, 2006 ARM Limited. All rights reserved.
ARM DDI 0337B
Advertisement
Table of Contents
