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Exceptions
5.4
Privilege and stacks
5.4.1
Stacks
5-8
The processor supports two separate stacks:
Process stack
Thread mode can be configured to use the process stack. Thread mode
uses the Main stack out of reset. SP_process is the SP register for the
process stack.
Main stack
Handler mode uses the main stack. SP_main is the SP register for the
main stack.
Only one stack, the process stack or the main stack, is visible at any time. After pushing
the eight registers, the ISR uses the main stack, and all subsequent interrupt
pre-emptions use the main stack. The rules for which stack saves context are:
•
Thread mode uses either the main stack or the process stack, depending on the
value of the CONTROL bit [1], which can be accessed by MSR or MRS. This bit
can also be set using appropriate EXC_RETURN values when exiting an ISR. An
exception that pre-empts a user thread saves the context of the user thread on the
stack that the Thread Mode is using.
•
All exceptions use the main stack for their own local variables.
Using the process stack for the Thread mode and the main stack for exceptions supports
Operating System (OS) scheduling. To reschedule, the kernel has to save only the eight
registers not pushed by hardware, r4-r11, and copy SP_process into the Thread Control
Block (TCB). If the processor saved the context on the main stack, the kernel would
have to copy the 16 registers to the TCB.
Note
MSR/MRS instructions have visibility of both stacks.
The stack model is independent of privileged mode. That is, Thread mode can use the
process or main stack and be in user or privileged mode. All four combinations of stack
and privilege are possible. For a basic protected thread model, the user threads run in
Thread mode using the Process stack, and the kernel and the interrupts run privileged
using the Main stack.
Copyright © 2005, 2006 ARM Limited. All rights reserved.
ARM DDI 0337B
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