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ARM Cortex-M3 Technical Reference Manual page 187

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Accessing the MPU using the alias registers

ARM DDI 0337B

You can optimize the loading speed of the MPU registers using register aliasing. There

are three sets of NVIC alias registers. These are described in NVIC register descriptions

on page 8-7.

The aliases access the registers in exactly the same way, and they exist to enable the use

of sequential writes (STM) to update between one and four regions. This is used when

disable/change/enable is not required.

Table 9-7 MPU protection region size field

Memory Protection Unit