Table 11-32 Bit Functions Of The Ahb-Ap Debug Rom Address Register; Table 11-33 Bit Functions Of The Ahb-Ap Id Register; Figure 11-20 Ahb-Ap Id Register - ARM Cortex-M3 Technical Reference Manual

System Debug
Field Name
[31:28] Revision
[27:24] JEP-106 continuation code
[23:17] JEP-106 identity code
[16] Class
[15:8] -
[7:4] AP Variant
[3:0] AP Type
11-40
Table 11-32 describes the fields of the AHB-AP Debug ROM Address Register.

Table 11-32 Bit functions of the AHB-AP Debug ROM Address Register

AHB-AP ID Register
This register defines the external interface on the access port.
Figure 11-20 shows the fields of the AHB-AP ID Register.
Table 11-33 describes the fields of the AHB-AP ID Register.
Definition
This field is zero for the first implementation of an AP design, and is updated
for each major revision of the design.
For an ARM-designed AP, this field has value 0b0100,
For an ARM-designed AP, this field has value 0b0111011,
0b1: This AP is a Memory Access Port
Reserved. SBZ.
: Cortex-M3 variant
0x1
: AMBA AHB bus
0x1
Copyright © 2005, 2006 ARM Limited. All rights reserved.
Field Name
[31:0] Debug ROM address

Table 11-33 Bit functions of the AHB-AP ID Register

Definition
Base address of debug interface.

Figure 11-20 AHB-AP ID Register

.
0x4
.
0x3B
ARM DDI 0337B