ARM Cortex-M3 Technical Reference Manual page 107

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Action
Enable interrupts
[Change Privilege]
"Loop"
ARM DDI 0337B
Description
Enable interrupts. Enable the interrupt processing in the NVIC. If it is not desirable to have
these occur as they are being enabled. If more than 32 interrupts, it will take more than one
Set-Enable register. PRIMASK can be used through CPS or MSR to mask interrupts until
ready.
[Change Privilege]. The Thread Mode privilege may be changed to user if required. This
should normally be handled by invoking the SVCall handler.
If sleep-on-exit is enabled, control will never return after the first interrupt/exception is
taken. If sleep-on-exit is selectively enabled/disabled, this loop can handle cleanup and
executive tasks. If sleep-on-exit is not used, the loop can do what it wants and can use WFI
(sleep-now) when wanted.
Example of reset routine
The reset routine is responsible for starting up the application and then enabling
interrupts. There are three methods for involving the reset ISR after interrupt processing
is performed. This is called the "main loop" part of the Reset ISR and the three examples
are shown below.
Example 5-1 Reset routine with pure sleep on exit (Reset routine does no main
void reset()
{
// do setup work (initialize variables, initialize runtime if wanted,
setup peripherals, etc)
nvic[INT_ENA] = 1;
nvic_regs[NV_SLEEP] |= NVSLEEP_ON_EXIT; // will not normally come back after
while (1)
wfi();
}
Example 5-2 Reset routine with selected Sleep model using WFI
void reset()
{
extern volatile unsigned exc_req;
// do setup work (initialize variables, initialize runtime if wanted,
Copyright © 2005, 2006 ARM Limited. All rights reserved.
// enable interrupts
1st exception
Table 5-8 Reset boot-up behavior
Exceptions
loop work)
5-21

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