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Debug Port
12-60
If you require the value from an AP register read, that read must be followed by one of:
•
A second AP register read. You can read the Control/Status Register, CSW, if you
want to ensure that this second read has no side effects.
•
A read of the DP Read Buffer.
This second access, to the AP or the DP depending on which option you used, stalls
until the result of the original AP read is available.
The Wire Control Register, WCR (SW-DP only)
The Wire Control Register is always present on any SW-DP implementation. Its
purpose is to select the operating mode of the physical serial port connection to the
SW-DP.
It is a read/write register at address 0b01 on read and write operations when the
CTRLSEL bit in the Select Register is set to b1. For information about the CTRLSEL
bit see The AP Select Register, SELECT on page 12-57.
Note
When the CTRLSEL bit is set to b1, to enable access to the WCR, the DP Control/Status
Register is not accessible.
Many features of the Wire Control Register are Implementation-defined.
Figure 12-24 shows the register bit assignments.
Figure 12-24 Bit assignments for the Wire Control Register (SW-DP only)
Copyright © 2005, 2006 ARM Limited. All rights reserved.
ARM DDI 0337B
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