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ARM DDI 0337B
DPnAP
A single bit, indicating whether the Data Port or the Access Port Access
Register is to be accessed. This bit is 0 for an APACC access, or 1 for a
DPACC access.
RnW
A single bit, indicating whether the access is a read or a write. This bit is
0 for an write access, or 1 for a read access.
ADDR[2:3] Two bits, giving the ADDR[3:2] address field for the DP or AP Register
Address:
•
For an APACC access, the register being addressed depends on the
ADDR[3:2] value and the value held in the SELECT register. For
details of the addressing see:
—
For details of the SELECT register see The AP Select Register,
SELECT on page 12-57.
•
For a DPACC access, the A[3:2] value determines which register is
accessed, see Table 12-13 on page 12-47.
Note
The A[3:2] value is transmitted LSB-first on the wire.
Parity
A single parity bit for the preceding packet.
Note
•
Parity bits are used to protect the header part of the packet, and the
data part separately. The ACK bits are redundantly encoded
already, and do not use any additional protection.
•
To calculate the parity bit for the header, count the number of bits
set out of DP/AP, RnW, and ADDR[0:1]. If this is odd (one or
three) then the parity bit should be set, to make the total number of
1s even. To calculate the parity bit for a data field, count the number
of bits set in just the 32 data bits. If this is odd, then the parity bit
should be set, to make the total number of 1s even.
Stop
A single stop bit. In the synchronous SWD protocol this is always 0.
Park
A single bit. The host does not drive the line for this bit, and the line is
pulled high by the SWD interface hardware. The target reads this bit as 1.
Copyright © 2005, 2006 ARM Limited. All rights reserved.
Table 11-27 on page 11-35, if you want to access a AHB-AP
register.
Debug Port
12-23
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