Overview Of The External Interrupt And Nmi Controller - Fujitsu FR60 Hardware Manual

CHAPTER 10 EXTERNAL INTERRUPT AND NMI CONTROLLER
10.1

Overview of the External Interrupt and NMI Controller

The external interrupt controller is a block that controls external interrupt requests input
to NMI and INT0 to INT15.
"H" level, "L" level, rising edge, or falling edge can be selected as the level of a request
to be detected (except for NMI).
Note: INT8 to INT15 is not supported for MB91F353A/351A/352A/353A.
■ External Interrupt and NMI Controller Registers
The registers for the external interrupt and NMI controller are shown below.
bit 7
EN7
bit 15
ER7
bit 15
LB7
bit 7
LB3
The above registers (for eight channels) are provided in two sets for a total of 16 channels.
342
6 5 4
EN6 EN5 EN4 EN3
14 13 12 11
ER6 ER5 ER4 ER3
14 13 12 11
LA7 LB6 LA6 LB5
6 5 4
LA3 LB2 LA2 LB1
3 2 1 0
EN2 EN1 EN0
10 9 8
ER2 ER1 ER0
10 9 8
LA5 LB4 LA4
3 2 1 0
LA1 LB0 LA0
Enable interrupt register
(ENIR)
External interrupt
request register (EIRR)
External level register
(ELVR)