Fujitsu FR60 Hardware Manual page 103

In consideration of masking other causes after an EIT cause is accepted, the handlers of EIT causes that
occur at the same time are executed in the order shown in Table 3.7-5 .
Table 3.7-5 Order of Executing EIT Handlers
Order of executing handlers
1
2
3
4
5
6
7
8
*1: Other causes are abandoned.
*2: If the INTE instruction is executed in steps, only a step trace trap EIT occurs. An INTE cause is
ignored.
Figure 3.7-2 shows an example of multiple EIT processing.
Figure 3.7-2 Multiple EIT Processing
Priority
(High) NMI occurring
(Low) INT instruction
executed
*1
Reset
Undefined instruction exception
Step trace trap
INTE instruction
NMI (for users)
INT instruction
User interrupt
No-coprocessor trap, coprocessor error trap
Main routine
INT instruction
handler
(2) Executed next
Cause
*2
*2
NMI handler
(1) Executed first
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