Fujitsu FR60 Hardware Manual page 430

CHAPTER 14 UART, SERIAL I/O INTERFACE (SIO), INPUT CAPTURE MODULE, AND OUTPUT COMPARE
■ Block Diagram of the Serial I/O Interface (SIO)
Figure 14.2-1 shows a block diagram of the serial I/O interface (SIO).
(MSB first) D0 to D7
SI5-7
SO5-7
SCK5-7
Internal clock
2
SMD2 SMD1 SMD0
Note: The MB91F353A/351A/352A/353A do not have the SI5, SCK5, and S05 pins.
412
Figure 14.2-1 Block Diagram of the Serial I/O Interface
Internal data bus
SDR (Serial data register)
Control circuit
1 0
SI E SIR
D7 to D0 (LSB first)
Tr ansfer direction selection
Shift clock counter
BUSY STOP STRT MODE BDS
Interrupt
request
Internal data bus
Initial value
Read
Write
SCE
PFR
register