CHAPTER 3 CPU AND CONTROL UNITS
3.7.4
Interrupt Stack
The PC and PS values are saved and restored using the area pointed to by the SSP.
After an interrupt, the PC is stored at the address pointed to by the SSP and the PS is
stored at the address SSP + 4.
■ Interrupt Stack
Figure 3.7-1 shows an example of an interrupt stack.
[Before interrupt]
SSP
80000000
H
7FFFFFFC
H
7FFFFFF8
H
78
Figure 3.7-1 Interrupt Stack
80000000
H
Memory
[After interrupt]
SSP
80000000
H
7FFFFFFC
H
7FFFFFF8
H
7FFFFFF8
H
PS
PC