Fujitsu FR60 Hardware Manual page 619

Table C-3 Pin States in Single-Chip Mode (1 / 2)
Pin No. Port name
1 to 8 P20 to P27
9 to 16 P30 to P37
19 to 26 P40 to P47
27 to 34 P50 to P57
37 to 44 P60 to P67
164 P80
165 P81
166 P82
167 to 168 P83 to P84
169 P85
170 to 174 P90 to P94
158 to 161 PA0 to PA3
150 to 157 PB0 to PB7
147 to 149 PC0 to PC2
128 PG0
129 PG1
130 PG2
131 PG3
132 PG4
133 PG5
122 PH0
123 PH1
124 PH2
125 PH3
126 PH4
127 PH5
116 PI0
117 PI1
118 PI2
119 PI3
At initialization (INIT)
Specified-func-
tion name
Function
name
- P20 to P27
- P30 to P37
- P40 to P47
- P50 to P57
- P60 to P67
IN0
IN1
IN2 P80 to P85
-
IN3
- P90 to P94
- PA0 to PA3
- PB0 to PB7
- PC0 to PC2
SI4 PG0
SO4 PG1
SCK4 PG2
SI5 PG3
SO5 PG4
SCK5 PG5
SI2 PH0
SO2 PH1
SCK2 PH2
SI3 PH3
SO3 PH4
SCK3 PH5
SI0 PI0
SO0 PI1
SCK0 PI2
SI1 PI3
APPENDIX C Pin States in Each CPU State
Initial value
Sleep mode, sub-
clock sleep mode
Internal ROM
mode vector
(MD2 to 0 = 000)
Hi-Z output/input Previous state
enabled maintained
Stop mode, watch mode
HIZ=0 HIZ=1
Hi-Z output/
Previous state
input always
maintained
"0"
Re-marks
601