Fujitsu FR60 Hardware Manual page 625

Table D-5 Bit Manipulation
Mnemonic
BANDL #u4, @Ri
BANDH #u4, @Ri
*1
*BAND #u8, @Ri
BORL #u4, @Ri
BORH #u4, @Ri
*2
*BOR #u8, @Ri
BEORL #u4, @Ri
BEORH #u4, @Ri
*3
*BEOR #u8, @Ri
BTSTL #u4, @Ri
BTSTH #u4, @Ri
*1: The assembler generates BANDL if the bit is set at u8&0x0F, and BANDH if the bit is set at u8&0xF0. In some cases, both BANDL
and BANDH may be generated.
*2: The assembler generates BORL if the bit is set at u8&0x0F, and BORH if the bit is set at u8&0xF0. In some cases, both BORL and
BORH are generated.
*3: The assembler generates BEORL if the bit is set at u8&0x0F, and BEORH if the bit is set at u8&0xF0. In some cases, both BEORL
and BEORH are generated.
Table D-6 Multiplication and Division
Mnemonic
MUL Rj,Ri
MULU Rj,Ri
MULH Rj,Ri
MULUH Rj,Ri
DIV0S Ri
DIV0U Ri
DIV1 Ri
DIV2 Ri
DIV3
DIV4S
1
*
*DIV Ri
2
*
*DIVU Ri
*1: DIV0S, DIV1 x 32, DIV2, DIV3, or DIV4S is generated. The instruction code length becomes 72 bytes.
*2: DIV0U or DIV1 x 32 is generated. The instruction code length becomes 66 bytes.
Type OP CYCLE
C 80 1+2a
C 81 1+2a
C 90 1+2a
C 91 1+2a
C 98 1+2a
C 99 1+2a
C 88 2+a
C 89 2+a
Type OP CYCLE
A AF 5
A AB 5
A BF 3
A BB 3
E 97-4 1
E 97-5 1
E 97-6 d
E 97-7 1
E 9F-6 1
E 9F-7 1
36
NZVC Operation
---- (Ri)&=(0xF0+u4)
---- (Ri)&=((u4<<4)+0x0F)
---- (Ri)&=u8
---- (Ri) | = u4
---- (Ri) | = (u4<<4)
---- (Ri) | = u8
---- (Ri) ^ = u4
---- (Ri) ^ = (u4<<4)
---- (Ri) ^ = u8
0C-- (Ri) & u4
CC-- (Ri) & (u4<<4)
NZVC Operation
→
CCC-
Ri * Rj MDH,MDL
→
CCC-
Ri * Rj MDH,MDL
→
CC--
Ri * Rj MDL
→
CC--
Ri * Rj MDL
----
----
-C-C
-C-C
----
----
→
-C-C
MDL / Ri MDL,
→
MDL % Ri MDH
→
-C-C
MDL / Ri MDL,
→
MDL % Ri MDH
APPENDIX D Instruction Lists
Remarks
Low-order 4 bits are
manipulated.
High-order 4 bits are
manipulated.
Low-order 4 bits are
manipulated.
High-order 4 bits are
manipulated.
Low-order 4 bits are
manipulated.
High-order 4 bits are
manipulated.
Low-order 4 bits are
manipulated.
High-order 4 bits are
manipulated.
Remarks
32bit*32bit=64bit
No sign
16bit*16bit=32bit
No sign
Step operation
32bit/32bit=32bit
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