Overview Of The Input Capture Module - Fujitsu FR60 Hardware Manual

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CHAPTER 14 UART, SERIAL I/O INTERFACE (SIO), INPUT CAPTURE MODULE, AND OUTPUT COMPARE
14.3.1

Overview of the Input Capture Module

The input capture module consists of an input capture data register and an input
capture control register.
■ External Input Pin Corresponding to Each Input Capture Channel
An external input pin is assigned to each input capture channel.
The valid edge of the external input signal can be selected from the following three types:
Rising edge
Falling edge
Both rising and falling edges
An interrupt can be generated when a valid edge of an external input signal is detected.
The MB91350A has four input capture channels.
■ Input Capture Module Registers
The input capture module registers are shown below.
15
14
CP15
CP14
7
6
CP07
CP06
7
6
ICP3
ICP2
7
6
ICP1
ICP1
426
13
12
11
CP13
CP12
CP11
CP10
5
4
3
CP05
CP04
CP03
CP02
5
4
3
ICE3
ICE2
EG31
EG30
5
4
3
ICE1
ICE0
EG11
EG10
10
9
8
Input capture data register
(IPCP) (high-order bits)
CP09
CP08
2
1
0
Input capture data register
(IPCP) (low-order bits)
CP01
CP00
2
1
0
Input capture control register
(ICS23)
EG21
EG20
2
1
0
Input capture control register
(ICS01)
EG01
EG00

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