Fujitsu FR60 Hardware Manual page 392

CHAPTER 12 A/D CONVERTER
Note:
The A/D conversion time per channel from the start of conversion to the end of conversion is
"sampling time + conversion time a + conversion time b + conversion time c + 3 machine cycles".
■ Recommended ADCT Register Value
If the peripheral system clock is 25 MHz, the value shown below is recommended as the value to be set in
the ADCT register. (Set each of the sampling time, conversion time a, conversion time b, and conversion
time c to be 245 ns or more.)
ADCT
Sampling time
+
(5×2+1)
374
0101 0011
B
0011 0100
B
Conversion time a +
Conversion time b
(3×2+1)
+
Conversion time c
(4×2+1)
(3×2+1)
+ 3 =
37 cycles(1.48µs)