Fujitsu FR60 Hardware Manual page 545

MB91xxx
Read cycle
I-bus
D-bus
■ Flow of Data During Fly-By Transfer
Figure 16.5-7 and Figure 16.5-8 show the flow of data during fly-by transfer.
MB91xxx
Read cycle
Figure 16.5-6 Internal RAM Area → Internal I/O Area Transfer
Internal RAM area => built-in I/O area transfer
DMAC
X-bus
Bus controller
Data buffer
F-bus
RAM I/O
Figure 16.5-7 Fly-by Transfer (Memory → I/O)
Fly-by transfer (memory to I/O)
DMAC
I-bus
X-bus
Bus controller
D-bus
Data buffer
F-bus
RAM I/O
MB91xxx
Write cycle
I-bus
D-bus
Memory read by RD or CSx
I/O write by RD or DACK
Fly-by transfer by SDRAM disabled
DMAC
X-bus
Bus controller
Data buffer
F-bus
RAM I/O
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