Fujitsu FR60 Hardware Manual page 269

■ Block Diagram of the 8/16-bit Up/Down Counters/Timers (ch1)
Figure 6.1-2 shows a block diagram of the 8/16-bit up/down counters/timers (for Channel 1).
Figure 6.1-2 Block Diagram of the 8/16-bit Up/Down Counters/Timers (ch1)
ZIN1
AIN1
BIN1
Note:
The MB91F353A/351A/352A/353A do not have ch1.
Data bus
CGE1 CGE0 CGSC
Detects edge
or level
UDCC
CES0
CES1
CMS1 CMS0
Carry
M16E
Count clock
Select up
or down
CSTR
count
clock
UDF1
Prescaler
CLKS
8 bits
RCR1 (Reload/
compare register 1)
Control
CTUT
reload
UCRE
RLDE
Clear
counter
8bit
UDCR1 (Up/down count
register 1)
UDFF
UDF0
CDCF
Output interrupt
CMPF
OVFF
UDIE
CITE
CFIE
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