Fujitsu FR60 Hardware Manual page 221

■ Byte Access
External access using byte access is shown below:
16-bit bus
width
D31
D00
D31
D00
D31
D00
D31
D00
Big endian mode
Internal External
Reg terminal
address: "0"
D31
AA
D16
AA
(1)
Internal External
Reg terminal
address: "1"
D31
BB
D16
BB
(1)
Internal External
Reg terminal
address: "2"
D31
CC
D16
CC
(1)
Internal External
Reg terminal
address: "3"
D31
DD
D16
DD
(1)
Internal
Control
Reg
terminal
address: "0"
D31
WR0
AA
D00
Internal
Control
Reg
terminal
address: "1"
D31
WR1
BB
D00
Internal
Control
terminal Reg
address: "2"
D31
WR0
CC
D00
Control Internal
terminal Reg
address: "3"
D31
WR1
DD
D00
Little endian mode
External Control
terminal terminal
D31
WR0
AA
D16
(1)
External Control
terminal terminal
D31
BB
WR1
D16
(1)
External Control
terminal terminal
D31
CC WR0
D16
(1)
External Control
terminal terminal
D31
DD
WR1
D16
(1)
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